Principal Design Engineer

Cadence · Bangalore, India

Open. First seen 21 September 2026.

Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities: Contribute to AMS design for High-speed Memory PHYs. Responsible for major sub-system of Memory PHY like Tx, Rx or Clocking Understand system…

Read the full posting on www.themuse.com

Other openings for this role

2 open postings for this role in Bangalore, India, first posted 20 September 2026. The company is likely hiring for more than one position. None has been taken down and posted again.

21 September 2026 – open (this posting)
20 September 2026 – open

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