Silicon Logical Design Engineer - Multiple Levels
- Level
- Mid
Not stated in the posting: salary, work type, visa.
Open. First seen 2 October 2026.
About the role
About Graphcore
At Graphcore, we’re building the future of AI compute.
We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.
As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.
To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.
We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.
Job Summary
Working within the Logical Design team, the Silicon Logical Design Engineer is responsible for a wide range of logical design tasks which require working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture specifications and RTL for Graphcore chips, and assisting the rest of the Silicon teams to ensure we can meet the company objectives for silicon delivery.
Responsibilities and Duties
- Integrate IP and subsystems into top-level SoC designs
- Develop and maintain build and configuration environments
- Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level
- Support verification and physical design teams through clean interface hand-offs
- Debug and resolve integration-related issues across multiple hierarchies
- Contribute to the continuous improvement of integration flows and automation
- Producing high quality microarchitecture and other documentation
- Ensure good communication between sites to maintain consistent working practices
Essential skills:
- Degree in Computer Science, Engineering or a related subject
- Digital design experience in a relevant industry
- Be highly motivated, a self-starter, and a team player
- Ability to work across teams and finding solutions to problems
- Ability to solve design issues through programming, e.g. Python, Tcl
- Strong competency in SystemVerilog or VHDL
- Knowledge of digital design flows
- Capable of managing time and priorities
Desirable:
- Processor design
- Application specific blocks
- High-speed serial interfaces
- Complex third-party IP integration
- Experience leading teams
- Arithmetic pipeline design
- Floating-point design
- Design for test
- Synthesis
- Timing Analysis
- Logical Equivalence
- Project Planning
- Power Integrity
- Silicon transistor knowledge
Benefits
In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar!
We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.
What this role asks for
Particular to this role
VHDL · Verilog
Rare in Graphcore's other 187 open postings.
In most of Graphcore's ads
Python
Named in most of its open postings, whatever the role.
Compared with Graphcore's other open jobs.
The team: Logical Design HIRES STEADILY
This role is one of 6 open in Logical Design. 2 were posted in the last 30 days and the oldest in October: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (5 of 6), Verilog (5 of 6), VHDL (2 of 6)
OTHER ROLES ON THIS TEAM
- Director, Logical Design posted Oct 26
- Graduate Silicon Engineer 2027 posted Oct 20
- Senior Silicon Logical Design Engineer posted Sep 1
- Director, Silicon Logical Design posted Apr 2
- Staff Silicon Logical Design Engineer posted Oct 28
From the team and dates on Graphcore's own job board.
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