Processor Architect
- Level
- Lead
Not stated in the posting: salary, work type, visa.
Open. First seen 2 October 2026.
About the role
About Fractile
Fractile's standard text
Fractile was founded in 2022 on the bet that, eventually, the world’s most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been building chips and systems that tackle this problem: how to efficiently generate output at thousands of tokens per second, while handling the complexity and capacity challenges of operating large models at very long contexts.
The workloads that push to the limits of the current frontier are already transformational; it is the technical and economic limits on inference speed that are constraining progress. The defining work of the 21st century will be marked by the engine of inference delivering immense and diffuse chains of intellectual inquiry, in drug discovery, in software engineering, in materials discovery, in any field where progress is driven by deep reasoning and intelligence to resolve complex problems.
As Processor Architect, you'll define and drive the architecture of our core compute engines, ISA definitions and programming models through to memory hierarchies, and on-chip interconnects. This isn't just about hitting PPA targets on a spreadsheet; you'll work closely with logical design, physical design, and verification teams to translate architectural intent into working silicon that performs in the real world. Expect to be hands-on in performance modelling, detailed specification writing, bottleneck analysis, pre and post-silicon validation.
You'll be the driving force behind the computational heart of our products ensuring every cycle counts and every watt is well spent.
Key Responsibilities
- Define and own the compute engine architecture specifications, balancing performance, flexibility, power, area, and design complexity.
- Lead architectural exploration from early concept through to specification, coordinating with modelling, implementation, verification, and physical design teams.
- Specify execution units, memory hierarchy, instruction sets and flow — making principled trade-offs at every level.
- Help build and maintain performance models and simulators to guide architectural decisions with data.
- Partner with the system architecture and software/modelling teams to ensure the processor delivers real-world application performance, not just benchmark wins.
- Evaluate emerging techniques — compact number formats, novel compute paradigms, advanced packaging options — to inform the architectural roadmap.
- Act as a technical mentor, raising the bar for rigour in performance analysis and architectural documentation across the team.
- Represent compute engine architecture in technical reviews, partner discussions, and customer engagements.
Skills & Experience
- Proven experience as a Processor Architect, CPU/GPU Architect, or similar role in semiconductor or high-performance computing domains.
- Deep understanding of compute engine and processor architecture and design, including matrix and vector centric floating-point arithmetic and memory hierarchies.
- Strong grasp of RTL design flows and physical design constraints and how they feed back into architectural choices.
- Experience taking processor designs from early exploration through to tapeout and post-silicon performance characterisation.
- Demonstrated ability to define and manage performance and power budgets and navigate complex trade-offs.
- Comfortable working across many disciplines, including architecture, modelling, implementation, verification, and software.
- Excellent communicator who can bridge architectural depth with system-level and product-level context.
Desirable
- Background in AI acceleration, vector/matrix compute, or domain-specific processor design.
- Experience with architectural performance modelling tools and frameworks (gem5, SystemC, custom cycle-accurate simulators).
- Familiarity with compiler and toolchain interactions, understanding how software maps to hardware.
- Prior start-up or scale-up experience, someone who thrives in ambiguity and fast iteration.
How we work
- Ownership and execution: you will have full agency to drive your work forward
- Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines
- Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact
- Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there
- Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter whose it is
What We Offer
- Competitive salary: A competitive salary reflective of your experience and the specialist nature of the role.
- Equity & Ownership: meaningful equity so everyone shares in the value creation.
- Benefits: Private Medical, Dental and Vision, Contributory Pension, 25 Days holiday plus bank holidays and Life/Critical Illness Insurance.
- Diverse & fun office: we believe the hardest problems get solved by the broadest range of minds. We are committed to Equal Employment Opportunity through attracting and retaining a diverse team and building an inclusive environment.
Fractile is seeking to increase the clock speed of global progress, one chip at a time. We’ve recently raised $220M from investors including Founders Fund and Accel and our most important work lies ahead. Join us!
Fractile's standard text
Export controls
Our work involves technologies subject to UK, US and other international export control regulations. Certain roles may require additional eligibility checks to ensure compliance with applicable law. We'll be transparent about this throughout the hiring process.
What this role asks for
74% of this description is written for the role. The rest is Fractile's standard text, folded away below.
Read against Fractile's other open postings on this site.
The team: Silicon
This role is one of 13 open in Silicon.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (7 of 13), Bazel (5 of 13), C++ (4 of 13), Verilog (4 of 13), Perl (2 of 13)
OTHER ROLES ON THIS TEAM
- Lead RTL Designer (PPA Experience) posted Sep 7
- Silicon Infrastructure Engineer posted Jun 9
- Senior Verification Engineer posted May 22
- Senior Verification Engineer posted May 22
- Senior Logical Design Engineer posted May 22
- Senior Logical Design Engineer posted May 22
- Verification Engineer posted May 22
- Verification Engineer posted May 22
- Senior/Principal DFT Engineer posted Apr 30
- Processor Architect posted Mar 11
- Senior/Principal Physical Design Engineer posted Jan 2
- Senior/Principal Physical Design Engineer posted Feb 12
From the team and dates on Fractile's own job board.
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