Sr. FPGA Engineer
- Salary
- $160K - $210K
- Level
- Senior
- Work type
- On-site · Burlingame
- Visa
- Not stated
Open. First seen 2 October 2026.
The team: Engineering HIRES STEADILY
This role is one of 18 open in Engineering. 1 was posted in the last 30 days and the oldest in January: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (13 of 18), C++ (7 of 18), AWS (6 of 18), CI/CD (6 of 18), Bash (5 of 18), GitLab (5 of 18), Kubernetes (5 of 18)
OTHER ROLES ON THIS TEAM
- Cloud Infrastructure Engineer - Platform Engineering posted Sep 23
- Technical Program Manager, Software posted Sep 16
- Technical Writer posted Sep 3
- Cloud Security Specialist – Platforms Engineering posted Aug 24
- Senior Cloud Architect – Platforms Engineering posted Aug 24
- RF Test Engineer posted Jul 30
- Sr. Mechatronics Designer/Specialist posted Jul 28
- Sr. Navigation Engineer posted Jul 9
- Lead RF Engineer posted Jun 17
- Software Engineer – Space Systems posted Jun 3
- Software Engineer - Build & Release posted Jun 3
- Sr. RF Engineer posted May 19
- GNSS Engineer posted Apr 24
- Communications / DSP Engineer posted Apr 14
- Software Engineer- Cybersecurity and Cryptography posted Apr 8
- Sr. Flight Dynamics Engineer posted Jan 20
- Sr. Full Stack Engineer posted Jan 17
From the team and dates on Xona Space Systems's own job board.
About the role
Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth.
With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection.
We’re seeking a Senior FPGA Engineer to lead the architectural specification and design of next-generation LEO PNT satellite systems. You will own the FPGA signal-processing pipeline from concept through flight-ready hardware, making critical trade-offs between mathematical idealization and physical hardware constraints.
What you’ll Do
- FPGA Architecture Ownership: Define and specify hardware architecture for high-dynamic acquisition, tracking, data decoding, and measurement processing pipelines.
- DSP/FPGA Implementation: Lead fixed-point design, resource budgeting, and pipeline optimization to achieve performance and latency targets.
- Technical Leadership: Establish RTL best practices and guide junior engineers through complex design cycles and hardware validation phases.
- Cross-Functional Integration & HW/SW Partitioning: Define and optimize HW/SW partitioning in collaboration with SW teams; ensure efficient SW interfaces, seamless integration, robust system-level testing, and preservation of performance margins.
- Performance & Risk Management: Drive timing closure, power optimization, and system-level performance verification; resolve complex cross-domain issues.
- Vendor & IP Integration: Evaluate and integrate third-party IP cores, define acceptance criteria and compliance testing.
- Verification Strategy: Establish robust verification frameworks, including simulation, emulation, and hardware validation.
What you’ll bring:
- PhD or MS/BS in EE/CE or related field, 7+ years of FPGA and DSP implementation experience.
- Demonstrated ownership of complex FPGA signal-processing systems from architecture to hardware validation.
- Deep expertise in fixed-point DSP implementation, pipelining, and resource optimization.
- Strong experience with high-speed interfaces and complex FPGA subsystems.
- Expert proficiency with FPGA toolchains, static timing analysis, and on-chip debugging.
Preferred Qualifications:
- Experience with satellite communications, esp. with GNSS receivers and in spread-spectrum systems.
- Familiarity with processing of satellite-related measurements (code/carrier/Doppler/CN0, PRs, DRs).
- Experience supporting HIL and over-the-air validation environments.
Key Competencies:
- Strong DSP foundation with practical FPGA implementation expertise.
- Execution-focused mindset with emphasis on timing closure and hardware validation.
- Clear technical communication and documentation.
- Ability to collaborate across systems, RF, software, and navigation teams to deliver flight-ready FPGA solutions.
For U.S. Roles: To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States (i.e. Green Card holder), or other protected individual as defined by 8 U.S.C. 1324b(a)(3).
For U.K. Roles: To comply with U.K. regulations, this role requires Baseline Personnel Security Standard (BPSS) checks, and successful candidates must be eligible to obtain UK Security Clearance (SC).
For Canada Roles: Successful candidates must obtain and hold a security clearance at the reliability status level, and pass security assessment for the Canadian Controlled Goods Program (CGP) and ITAR.
We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.
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