Low Latency FPGA Developer

NK Securities Research is a leading financial firm that leverages cutting edge technology and sophisticated algorithms to trade the financial markets. Founded in 2011, we have gained invaluable experience in the field of High Frequency Trading across different asset classes. With a focus on innovation, entrepreneurship, and collaboration, we aim to foster a dynamic work environment that reflects a startup culture.

Role Overview

As an FPGA Developer, you will design, implement, and rigorously test RTL (Register-Transfer Level) designs to power our high-frequency trading strategies. Your contributions will play a pivotal role in reducing system latency and enhancing performance, directly impacting trading outcomes.

Key Responsibilities

• Design and Implementation:
• Develop high-performance RTL designs using VHDL or Verilog for FPGA-based systems.
• Optimize hardware implementations for ultra-low latency and high throughput.
• Testing and Debugging:
• Perform thorough functional and timing testing of RTL designs, ensuring adherence to specifications.
• Debug and resolve issues using FPGA debugging tools such as SignalTap, ChipScope, or ModelSim.
• Collaboration and Documentation:
• Work closely with hardware and software teams to ensure seamless integration of FPGA solutions with the Software Trading Stack.
• Maintain clear and comprehensive documentation of designs, test cases, results and benchmarks

Qualifications

Technical Skills:

• RTL Development:
• Strong fundamentals in digital logic design, Boolean algebra, FSMs and synchronous design.
• Proficiency in VHDL or Verilog/SystemVerilog, with a strong focus on efficient and optimized designs.
• FPGA Tools:
• Hands-on experience with industry-standard tools such as Xilinx Vivado.
• Testing and Verification:
• Expertise in writing testbenches and conducting simulation-based verification.
• Familiarity with static timing analysis and achieving timing closure.
• Familiar with CocoTB or any similar testing setup.
• Debugging:
• Proficiency in GHDL synthesis and analysis of Holding Time and Slack
• Ability to work with XSIM/ Vivado based Waveform simulator or any other external waveform simulation tool (GTK Wave etc.)
• Operating Systems and Networking
• Familiarity with operating systems concepts (memory, interrupts, and I/O), Linux and networking concepts.
• Familiarity with high-speed interfaces such as PCIe, Ethernet or DDR is a plus.
• Programming and Scripting:
• Familiarity with C/C++, Python, Bash/Shell scripting and TCL.
• Experience using Git, Makefiles, and automation scripts.

General Requirements

• Bachelor’s in Electrical Engineering, Computer Engineering, or a related field from top IITs.
• Proven track record in delivering high-quality RTL designs.
• Strong analytical and problem-solving skills.
• Ability to work independently while collaborating effectively in a team environment.

What We Offer:

• Competitive salary package
• Opportunity to work in a dynamic and collaborative environment
• Career growth and development opportunities
• Catered breakfast and lunch
• Annual international trip
• Monthly team dinners