Hardware Engineer (FPGA/ASIC)
- Level
- Mid
Not stated in the posting: salary, work type, visa.
Open. First seen 3 October 2026.
About the role
About the Position
We are looking to hire engineers with experience in both software and hardware design to help us build our FPGA or ASIC-based applications.
We're big believers in the ability of tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we’re looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. The hardware team at Jane Street works on both FPGA and ASIC designs.
We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you’ll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.
In this role, you’ll work on the ground-up design and implementation of new FPGA or ASIC applications, and help extend and refine the high-level design and testing tools that we use internally. Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration, but you can also expect to work with some Verilog and C. While you don’t need to have worked with OCaml specifically, a good background in typed programming languages is a plus.
If you’d like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode.
About You
We don’t expect you to have a background in OCaml, finance, or any other specific field - we’re looking for smart programmers who will approach hardware design with a software engineering mindset. We’re more interested in how you think and learn than what you currently know. You should be:
- Comfortable with a software programming language
- Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
- Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
- Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
- Interested in learning how to use FPGAs or ASICs in the context of networking
- A top-notch programmer with a love for technology
- Intellectually curious, collaborative, and eager to learn
- Humble and unafraid to ask questions and admit mistakes
- Fluent in English
Jane Street's standard text
If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com
What this role asks for
96% of this description is written for the role. The rest is Jane Street's standard text, folded away below.
Read against Jane Street's other open postings on this site.
The team: Software Engineering
This role is one of 47 open in Software Engineering.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (22 of 47), Machine Learning (8 of 47), FPGA (6 of 47), SQL (6 of 47), C++ (5 of 47), Haskell (4 of 47), Jira (4 of 47)
OTHER ROLES ON THIS TEAM
- Software Engineer posted Sep 1
- Software Engineer posted Sep 1
- Software Engineer posted Aug 7
- Data Strategist posted Aug 7
- Hardware Engineer (FPGA/ASIC) posted Aug 3
- Software Engineer posted Aug 3
- Hardware Engineer (FPGA/ASIC) posted Jul 24
- Software Engineer posted Jul 21
- Data Engineer posted Jul 14
- Hardware Engineer (FPGA/ASIC) posted Jul 10
- Software Engineer posted Jul 9
- Software Engineer posted Jul 6
- Software Engineer posted Jul 6
- Compiler Engineer posted Jun 26
- Compiler Engineer posted Jun 17
- Formal Methods Engineer posted Jun 11
- Formal Methods Engineer posted Jun 11
- ASIC Physical Design Engineer posted Apr 30
- ASIC Physical Design Engineer posted Apr 17
- Technical Product Manager posted Jan 30
- ASIC Engineer posted Oct 29
- ASIC Engineer posted Oct 29
- FIX Onboarding and Connectivity Engineer posted Sep 12
- FIX Onboarding and Connectivity Engineer posted Sep 12
- Programming Language Engineer posted Oct 25
- Data Engineer posted Oct 4
- Software Engineer / Writer posted Sep 5
- Data Engineer posted Feb 15
- Market Data Specialist, Metadata posted Feb 13
- Technical Product Manager posted Jan 16
- Data Engineer posted Jan 9
- Technical Programme Manager posted Oct 28
- Low-Latency Engineer posted Jul 6
- Front End Software Engineer posted Jun 27
- Front End Software Engineer posted Jun 24
- Data Specialist posted May 3
- Production Engineer posted Jan 10
- Production Engineer posted Jan 10
- Software Engineer posted Dec 29
- Production Engineer posted Apr 1
- Production Engineer posted Mar 28
- Technical Program Manager posted Dec 11
- Software Engineer posted Jun 8
- Software Engineer posted May 6
- Software Engineer posted May 2
- Programming Language Engineer posted May 2
From the team and dates on Jane Street's own job board.
Other openings for this role
2 open postings for this role in London, England, United Kingdom, first posted 3 October 2026. The company is likely hiring for more than one position. None has been taken down and posted again.
- 3 October 2026 – open (this posting)
- 3 October 2026 – open
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