Analog and Mixed Signal Layout Engineer
- Level
- Senior
- Work type
- On-site · Bengaluru
Not stated in the posting: salary, visa.
Open. First seen 7 October 2026.
About the role
Analog and Mixed Signal Layout Engineer
About Lumilens
At Lumilens, we’re building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. Our technology enables faster, cooler, and more efficient computing through cutting-edge optical solutions and high-performance connectivity IPs. If you’re driven by innovation and eager to shape the future of AI infrastructure, we invite you to join our world-class engineering team.
What You Can Expect
- Play a key role in developing high-speed connectivity IPs using advanced semiconductor process technologies.
- Design and implement complex analog, mixed-signal, and RF layouts for high-performance connectivity IPs, including floorplanning, device placement, and routing.
- Work closely with circuit designers to translate schematics into robust physical implementations from floorplanning through tapeout.
- Own physical verification and signoff closure including DRC, LVS, ERC, antenna, DFM, and EMIR.
- Optimize layouts using extraction results to meet performance, matching, noise, and reliability targets.
- Contribute to layout reviews and help drive effective layout methodologies and best practices.
- Improve layout productivity and quality through automation, scripting, and AI-assisted workflows.
- Develop high-performance connectivity IPs used in AI, networking, and next-generation compute systems.
What We’re Looking For
- BE/B.Tech or MS/M.Tech in Electrical/Electronics Engineering, Microelectronics, or a related field with 5–10 years of experience in analog, mixed-signal, RF, or custom layout development.
- Hands-on experience with layouts for SerDes, data converters, clocking circuits, power management, transceiver building blocks, or related connectivity IPs.
- Proven experience in full-custom layout and signoff including RC extraction, DRC, LVS, ERC, DFM, and EMIR.
- Exposure to silicon photonics, co-packaged optics (CPO), near-package optics (NPO), optical transceivers, or high-bandwidth connectivity solutions is a strong plus.
- Experience with advanced semiconductor technologies including CMOS, FinFET, BiCMOS, or SiGe.
- Strong understanding of semiconductor process technologies, device physics, and layout-dependent effects.
- Proficiency with Cadence Virtuoso and industry-standard EDA tools.
- Experience leveraging automation, scripting, or AI-assisted methodologies to improve layout productivity and quality.
- Solid understanding of layout techniques including matching, shielding, clock distribution, power planning, ESD protection, latch-up prevention, manufacturability, and reliability-aware design.
- Demonstrated success delivering complex layouts through tapeout.
- Ability to work effectively with globally distributed design, verification, CAD, and technology teams.
- Experience supporting multiple projects in a fast-paced product development environment.
Why Join Lumilens?
- Work alongside leaders and innovators in the photonics and semiconductor industry
- Opportunity to make an impact on the infrastructure powering next-generation AI and high-performance computing
- Fast-paced, collaborative, and mission-driven environment
- Competitive compensation and benefits
Join us at Lumilens and help shape the future of compute connectivity!
The team: Engineering HIRES STEADILY
This role is one of 41 open in Engineering. 3 were posted in the last 30 days and the oldest in September: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (18 of 41), Embedded Systems (9 of 41), C++ (7 of 41), Test Automation (7 of 41), C (5 of 41), Linux (5 of 41), Perl (4 of 41)
OTHER ROLES ON THIS TEAM
- Senior/Staff/Principal IC Layout Engineer – Optical Engine Silicon posted Sep 24
- IC Layout Engineer – Optical Engine Silicon posted Sep 24
- Senior / Staff ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- ATE Test Engineer – Optical Transceiver Silicon posted Sep 16
- Active Alignment & NPI Process Development Engineer posted Sep 9
- Senior/ Staff NPI Wafer Bumping/Fan-Out Process Engineer posted Sep 7
- DSP Engineer posted Aug 31
- Silicon Photonic Engineer posted Aug 28
- Silicon Test Engineer posted Aug 5
- Senior Director, Hardware Engineering posted Jul 31
- Senior Silicon Photonics Test Engineer (NPI) posted Jul 29
- Staff Silicon Photonics Test Engineer posted Jul 23
- Senior Silicon Photonics Test Engineer posted Jul 23
- Senior Manager, Silicon Photonics Testing and Packaging posted Jul 20
- Senior Silicon Photonics Engineer posted Jul 15
- Sr. Physical Design Engineer posted Jul 10
- IC Design Verification Engineer posted Jul 6
- IC/RTL Design Engineer posted Jul 6
- Principal Engineer Silicon Photonics posted Jun 25
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- Modelling Lead (SystemC / Virtual-Platform Architect) posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- RTL Design Lead/IC Front-End Architect/Datapath Lead posted Jun 24
- Optical Systems Engineer Lead posted Jun 18
- Power Integrity Engineer-Silicon posted Jun 17
- Hardware Test Engineer posted Jun 17
- Principal Mechanical Engineer posted Jun 12
- Silicon Test Engineer posted May 29
- Silicon Photonic Engineer (CPO) posted May 20
- Senior Technical Program Manager (Silicon) posted May 7
- Senior Staff Software Engineer (MES & Distribution Systems) posted Apr 17
- Director of Silicon Test Engineering posted Mar 23
- Optical Test Engineer posted Mar 22
- Advanced Package Technology Principal Engineer posted Mar 22
- IC Package FEA Engineer posted Mar 22
- Senior Signal Integrity Engineer posted Feb 4
- Signal Integrity Engineer-1.6 OSFP Board Design posted Feb 4
- Senior/Principal Analog & Mixed Signal Design Engineers posted Dec 29
- Senior Software Test Automation Engineer posted Sep 25
- Systems Applications Engineer - Optical posted Sep 1
From the team and dates on Lumilens's own job board.
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