ASIC Design Verification Engineer

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.

This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead

You will:

• Partner with design and architecture teams to translate hardware specifications into comprehensive, scalable verification plans
• Drive the development of testbenches, reference models, and stimulus to validate mission-critical functionality and performance
• Architect and enhance verification environments, contributing to shared tools and reusable methodologies across the organization
• Evaluate, integrate, and verify third-party Verification IP (VIP) to accelerate the development cycle
• Define and analyze coverage metrics (functional and code) to ensure design readiness and closure
• Advocate and establish verification best-practices

You have:

• 3+ years of experience building and maintaining complex testbenches using UVM/SystemVerilog
• Proven track record with constrained-random generation, functional coverage, and SVA (SystemVerilog Assertions)
• Deep understanding of complex digital logic and the ability to debug intricate hardware/software interactions
• Proficiency in Python for developing scalable automation frameworks, data analysis tools, and regression management suites
• Excellent verbal and written communication skills, ability to collaborate with cross-functional teams
• Strong analytical skills in root-causing failures across RTL, testbench, and environment layers

We prefer:

• Experience spanning initial specification through post-silicon bring-up and validation
• Familiarity with power-aware verification (UPF), formal verification, or hardware-software co-validation
• Domain expertise in ML accelerators, high-speed interconnects (NoCs), or high-bandwidth memory
• Experience with C/C++ for reference model development and enhancement
• Hands-on experience with industry-standard interfaces such as PCIe Gen 5/6, DDR5, or Ethernet
• Interest or experience in leveraging Generative AI and LLMs to accelerate verification workflows, such as automated testbench generation, documentation, or failure log analysis

The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process.

Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.

Salary Range

$175,000—$215,000 USD