Silicon Design Lead
- Salary
- $287K - $485K
- Level
- Lead
- Work type
- Hybrid · San Francisco
Not stated in the posting: visa.
Open. First seen 4 November 2026.
About the role
About the Team
OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.
About the Role
We’re looking for a Silicon Design Lead to drive architecture, microarchitecture, and implementation of key IP and subsystems for our AI hardware platforms. You will translate functional, performance, and security requirements into efficient silicon designs, owning technical decisions from architectural definition through implementation and integration.
Part of this role will focus on hardware security implementation in close partnership with OpenAI’s Security team. While the Security team owns the overarching security architecture and requirements, you will translate those requirements into silicon microarchitecture and implementation, balancing security capabilities with performance, power, area, and design complexity. The other part of this role will focus on driving general silicon architecture/microarchitecture.
In this role, you will:
- Own architecture, microarchitecture, and implementation of silicon IP and subsystems, from requirements and design specifications through integration and validation.
- Define hardware interfaces, data flows, and microarchitectural tradeoffs to meet functional, performance, power, and area requirements.
- Partner closely with OpenAI’s Security team to translate security architecture, requirements, and threat models into implementable hardware capabilities.
- Design and integrate hardware security mechanisms, including encryption, key management, access controls, isolation, and data protection across silicon subsystems.
- Evaluate architectural and implementation tradeoffs to ensure security capabilities meet functional and performance requirements.
- Collaborate with silicon architects, RTL, verification, firmware, and software teams to drive subsystem design, integration, and validation.
- Review and contribute to RTL implementations, ensuring designs align with architectural intent and system requirements.
- Evaluate existing and third-party IP, identify architectural or implementation gaps, and drive solutions across subsystem boundaries.
You might thrive in this role if you:
- Have strong experience in silicon IP or subsystem-level architecture, microarchitecture, and implementation.
- Have owned hardware IP or subsystem designs from architectural definition through implementation and integration.
- Have experience implementing hardware security features such as memory encryption, key management, access controls, isolation, or secure boot.
- Understand how to translate functional and security requirements into hardware architectures, interfaces, and microarchitectural specifications.
- Have working knowledge of RTL design and coding proficiency in Verilog or SystemVerilog, with the ability to read, review, and contribute to RTL.
- Can evaluate performance, power, area, and complexity tradeoffs across silicon designs.
- Work effectively across security, silicon architecture, RTL, verification, firmware, and software teams to drive designs from concept through execution.
- Ideally, have broader SoC-level architecture or integration experience, though deep IP or subsystem-level expertise is sufficient.
To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
OpenAI's standard text
We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.
For additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement.
Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.
To notify OpenAI that you believe this job posting is non-compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance.
We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link.
OpenAI Global Applicant Privacy Policy
At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.
What this role asks for
Particular to this role
Embedded Systems · Verilog
Rare in OpenAI's other 299 open postings.
66% of this description is written for the role. The rest is OpenAI's standard text, folded away below.
Compared with OpenAI's other open jobs.
The team: Hardware HIRES STEADILY
This role is one of 30 open in Hardware. 7 were posted in the last 30 days and the oldest in October: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Embedded Systems (13 of 30), C++ (11 of 30), Python (11 of 30), Rust (11 of 30), C (8 of 30), Linux (7 of 30), Linux Kernel (4 of 30)
OTHER ROLES ON THIS TEAM
- ML Silicon Performance Lead posted Nov 3
- EDA Cloud & Developer Infrastructure Engineer posted Nov 3
- Product Cost Management Lead - AI Infrastructure posted Oct 26
- Product Reliability Engineer posted Oct 19
- Software Engineer, CI/CD & ML Infrastructure posted Oct 19
- SoC Engineer posted Oct 14
- Supply Chain Operations Program Manager, AI Infrastructure posted Sep 24
- Mechanical Engineer, Hardware Systems posted Sep 16
- Software Engineer, Manufacturing Infrastructure posted Sep 16
- Physical Design Engineer posted Sep 15
- Hardware Strategic Sourcing Manager, Optics posted Sep 11
- Hardware Systems Planning Lead (1P) posted Sep 4
- Software Engineer, AI accelerator Runtime posted Aug 24
- Systems Software Engineer, Silicon Bringup posted Aug 24
- Software Engineer, Model Runtime posted Aug 24
- Product Manufacturing Engineer - PCBA posted Aug 20
- RTL Design Engineer – Interconnect & Network Datapath posted Jun 23
- Systems Software Engineer, Security, First Party Hardware posted Jun 8
- Manufacturing Test Engineer posted Jun 5
- Host Systems Software Engineer posted Jun 3
- Supply Chain Program Manager (SCPM) - AI Infrastructure posted May 14
- Systems Software Engineer, Management Plane posted May 7
- Networking Operating System Firmware Engineer posted May 6
- Software Engineer, GPT Infrastructure posted Apr 27
- Software Engineer, Kernel Performance & AI Tooling posted Apr 17
- Component and Product Quality Engineer, Interconnects posted Feb 12
- ASIC Firmware Engineer, Modeling posted Feb 3
- Signal Integrity Engineer posted Jan 22
- Design Verification Engineer posted Oct 29
From the team and dates on OpenAI's own job board.
Similar jobs
- Technical Lead Digital Design Engineer at Astera Labs
Shares 2 skills: Verilog, Embedded Systems · Lead level · same country - Design Verification Engineer at Microsoft
Shares 2 skills: Verilog, Embedded Systems · same country - Embedded Design Engineer at Leidos
Shares 2 skills: Verilog, Embedded Systems · same country - Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development at Qualcomm
Shares 2 skills: Verilog, Embedded Systems · same country - Principal FPGA Design Engineer at Terran Orbital Corporation
Shares 2 skills: Verilog, Embedded Systems · same country - Technical Program Manager, Global Infrastructure Planning at OpenAI
Also at this company
More jobs like this
Is this your posting? Email info@careerholo.com to have it removed.