Design Engineer, Factory Acceleration

Job Summary
Etched is seeking a Test Design Engineer to own how our AI systems are tested end to end: the overall test strategy and the test systems that carry it out, from silicon bring-up through boards, servers, and full racks, and from early validation into production.

You will join a new, small central team that owns making testing reliable, repeatable, and scalable. Our domain teams (firmware, system software, inference, platform hardware, and silicon validation) each bring deep expertise in their own tests. You will bring the full picture: what the complete test strategy should be at every stage, how tests are built, gated, and run as one system, whether they actually catch the defects that matter, and how they hold up at production volume. When a failure doesn't have an obvious owner, you will be the engineer who finds out why.

Key Responsibilities

• Define and own the overall test strategy and coverage map across silicon, firmware, board, server, and rack levels, from EVT/DVT/PVT validation through production.
• Design the test systems and frameworks that carry out that strategy: how tests are structured, versioned, gated, and run across the lab and the factory.
• Review test plans from domain teams at each build phase, find coverage gaps and unnecessary duplication, and balance coverage against test time.
• Build regression gating so changes to firmware, drivers, and test packages are validated on representative hardware before they ship.
• Define pass/fail criteria, retest policies, and diagnostics, and work with Production to turn them into clear procedures.
• Lead technical triage of failures that cross hardware, firmware, and software: read logs, reproduce issues, isolate root cause, and drive corrective actions with domain engineers.
• Turn repeated failures into better tests, upstream screening, and diagnostics.
• Partner with Test Infrastructure and our manufacturing partners to bring the strategy into production, including travel to Taiwan.

You may be a good fit if you have (Must-have qualifications)

• You have owned the test strategy or test systems for at least one hardware product from bring-up into production.
• Hands-on experience across levels of test: low-level firmware, board-level, and system-level testing.
• Experience designing regression gating or CI for hardware and firmware.
• Strong debugging skills across hardware, firmware, and software, working from logs and lab tools.
• Clear communication across teams, and comfort making coverage and risk tradeoffs explicit.
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
• Willingness to work onsite in San Jose and travel internationally to manufacturing partners.

Strong candidates may also have experience with (Nice-to-have qualifications)

• 8+ years in test engineering, test architecture, system validation, or test automation for hardware products.
• Server, rack, GPU, or accelerator systems, including post-silicon bring-up and rack-level (L10/L11) integration testing.
• BMC, BIOS, PCIe, high-speed interconnects, power and thermal validation.
• Hardware-in-the-loop test systems.
• Factory test, test stations, or working with contract manufacturers and ODMs.
• Yield analysis and data-driven test optimization.
• Bringing first-generation hardware into production at a fast-paced startup.

Benefits

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2,500 per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in our office
• Unlimited compute budget subject to ROI justification

How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.