CPU Power Management Microarchitect/RTL Engineer
Apple · Beaverton, OR · $184,700 - $324,800
Open. First seen 2 October 2026.
Description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and…
Read the full posting on www.themuse.com
Other openings for this role
6 open postings for this role in Beaverton, OR, first posted 2 October 2026. The company is likely hiring for more than one position. None has been taken down and posted again.
- 4 October 2026 – open
- 4 October 2026 – open
- 2 October 2026 – open
- 2 October 2026 – open
- 2 October 2026 – open
- 2 October 2026 – open (this posting)
Salary context
6 other open postings titled CPU Power Management Microarchitect/RTL Engineer state a salary: median USD 184,700 to USD 324,800 a year.
Similar jobs
- Senior Software Engineer - Low Power Verification at Cadence
Shares 5 skills: VHDL, Verilog, Perl… · Senior level - Sr. Staff/Principal Engineer, Digital Design (San Diego) at InnoPhase IoT
Shares 6 skills: VHDL, Verilog, Perl… · same country - Senior Flight Software Engineer at AST SpaceMobile
Shares 5 skills: VHDL, Verilog, C… · Senior level · same country - FPGA Firmware Engineer at Innovative Signal Analysis
Shares 5 skills: VHDL, Verilog, C… · Senior level · same country - Sr. ASIC Verification Engineer at Tensordyne
Shares 5 skills: Verilog, Perl, C… · Senior level · same country - DDR Design Engineer at Apple
Also at this company
Is this your posting and you want it taken down? Email info@careerholo.com.