Technical VP - Computing Bus System Research
- Level
- Lead
- Work type
- On-site · Markham
Not stated in the posting: salary, visa.
Open. First seen 3 October 2026.
About the role
Huawei Canada has an immediate permanent opening for a Technical VP.
About the team:
The Computing Data Application Acceleration Lab aims to create a leading global data analytics platform organized into three specialized teams using innovative programming technologies. This team focuses on full-stack innovations, including software-hardware co-design and optimizing data efficiency at both the storage and runtime layers. This team also develops next-generation GPU architecture for gaming, cloud rendering, VR/AR, and Metaverse applications.
One of the goals of this lab are to enhance algorithm performance and training efficiency across industries, fostering long-term competitiveness.
About the job:
- Conduct in-depth insight and analysis of industry cutting-edge bus architectures and technologies, develop long-term technology plans and roadmaps, and lead technical decision-making.
- Build competitive bus architectures and interconnection protocols for AI/general computing scenarios, in align with mainstream architectures and protocols in the industry. Drive the continuous evolution of bus technology, ensuring an industry-leading competitive edge of large-scale computing cluster solutions.
- Deeply understand the chip architecture and software framework. Implement system-level innovative solutions centered around bus architecture and protocols. Drive co-innovation across chip design, hardware/software, and solutions to ensure business success.
About the ideal candidate:
- Solid foundational knowledge in computer science and computer architecture. In-depth knowledge of bus/network protocols such as PCIe, CXL, and InfiniBand. Familiarity with technologies related to in-order delivery, congestion, retransmission, multipath, flow control, QoS, network measurement, fault tolerance, and reliability. Experience in architecture design and R&D is preferred in scenarios such as high bandwidth, low latency, and homogeneous/heterogeneous computing interconnection.
- Familiarity with AI large model training, big data, search and push, distributed database, and other application scenarios. Experience in large-scale computing cluster architecture design, hardware-software co-optimization for performance, and relevant implementation outcomes are preferred.
- Experience in leading the planning, architecture design, and implementation of relevant chips or products.
- Strategic vision and technical leadership, with strong communication skills and good insight.
What this role asks for
Particular to this role
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The team: Computing Data Application Acceleration Lab
This role is one of 15 open in Computing Data Application Acceleration Lab.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
LLM (8 of 15), PyTorch (5 of 15), Deep Learning (4 of 15), Flink (4 of 15), Spark (4 of 15), C++ (3 of 15), Machine Learning (3 of 15)
OTHER ROLES ON THIS TEAM
- Research Engineer - AI Workload & Systems posted Jul 30
- Intern Researcher - AI/ML Technology Insight and Planning posted Jun 15
- Intern Engineer – RL Post-Training for LLMs posted Jun 8
- Intern Researcher – AI Foundation Model Training posted Apr 28
- Principal Architect – Hardware Efficient AI Foundation Model Training posted Sep 18
- Senior Researcher – Hardware Efficient AI Foundation Model Training posted Sep 18
- Database Research Expert - Big Data Platform posted Aug 25
- Technical VP – GPU Applications Architecture posted Jul 3
- Senior Researcher - AI Powered Big Data Platform posted Jan 7
- Principal Scientist - Software/Hardware Co-design posted May 17
- Technical VP - Big Data Platform posted Apr 10
- Researcher - Technical Insight and Planning (AI/ML) posted Dec 15
- Senior Software Developer – Big Data (C++/Rust) posted Dec 16
- Senior Technical VP - AI & Efficient Deep Learning posted Dec 16
From the team and dates on huaweicanada's own job board.
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