Physical Design Architect
- Salary
- Not stated
- Level
- Lead
- Work type
- Not stated
- Visa
- Not stated
Open. First seen 7 October 2026.
The team: Semiconductor Engineering
This role is one of 11 open in Semiconductor Engineering. 11 were posted in the last 30 days.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Perl (7 of 11), Python (7 of 11), Verilog (2 of 11)
OTHER ROLES ON THIS TEAM
- DFT Architect (Physical Design & Chiplet) posted Sep 27
- Physical Design SiP Architect posted Sep 27
- Senior EDA / CAD Engineer posted Sep 27
- Senior RTL Design Engineer posted Sep 27
- SoC System Architect posted Sep 27
- Lead STA Engineer posted Sep 26
- Senior Physical Design Engineer (Floorplan & PnR) posted Sep 26
- Senior Physical Design Engineer (Synthesis, SDC & STA) posted Sep 26
- VLSI Functional Safety Hardware Architect posted Sep 26
- Senior DFT Engineer posted Sep 26
From the team and dates on Envision Employment Solutions's own job board.
About the role
Envision Employment Solutions is currently looking for a Physical Design Architect for one of our partners, an IT Services and IT Consulting company.
THE ROLE
You'll set the physical design strategy for high performance processor and ASIC designs, making the early decisions that decide whether PPA targets are reachable at all. This is an architect's role with deep implementation roots, for someone who has closed timing, planned power and then stepped up to shape the approach for the whole chip.
WHAT YOU'LL DO
- Define the physical design architecture and methodology for microprocessor and ASIC projects
- Drive early floorplan, partitioning and power planning decisions
- Set the STA and timing closure strategy across blocks and full chip
- Lead power analysis and PPA exploration with architecture and RTL teams
- Guide place and route strategy and review implementation quality
- Use SystemC and architecture models to assess the physical impact of design choices, including RISC based cores
- Mentor physical design engineers and lead technical reviews
WHAT WE'RE LOOKING FOR
- 10+ years of experience in physical design, with a track record on microprocessor or complex ASIC designs
- Deep expertise in STA, place and route and power analysis
- Understanding of RISC architectures and CPU microarchitecture
- Experience with SystemC or architecture level modelling
- Multiple tapeouts on advanced nodes
- Strong technical leadership and communication skills
YOU'LL THRIVE HERE IF YOU
- You'd rather make the right call early than fix it late
- You understand CPU architecture well enough to challenge it on physical grounds
- You enjoy guiding engineers as much as solving problems yourself
- You think in PPA trade offs from day one
- You want your methodology to become the team standard
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