Custom Memory Design Engineer
- Salary
- $200K - $400K
- Level
- Mid
- Work type
- Hybrid · Mountain View
Not stated in the posting: visa.
Open. First seen 16 October 2026.
About the role
Normal Computing Corporation's standard text
Normal Computing | Build with Us
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London.
The Role
Hybrid: 3 days a week in the office, in Mountain View, New York or London.
As a Custom Memory Design Engineer, you will build the custom memories that power our unconventional computing architecture.
You will design unique RAM circuits in various RAM technologies, including SRAMs and DRAMs to support a unique computational architecture. Working alongside silicon architecture, digital design, memory architects, and analog design engineers, you will own the end-to-end development of various RAM circuits, from clean-sheet design through closure and tapeout, and silicon bring-up, unlocking unprecedented throughput-per-watt.
What You Will Own
- RAM design flow design and methodology: lead the full custom RAM development cycle, from architecture, establishing methodology, tooling, design, to closure
- Partnership and Acquisition: Develop or acquire RAM IP for use in Normal Silicon, including RAM PDKs
- EDA tooling: Acquire or help direct RAM design EDA tool development
What Makes You a Great Fit
- Developed RAM IP from spec to GDSII in modern technologies, taped out and brought up.
- Worked on memory technologies (i.e. SRAM, DRAM) at the core level (bitcell arrays and peripheral circuits)
- Designed and characterized custom bitcells in schematic and layout
- Fluent in the Cadence flow: Virtuoso, Spectre, Assembler, Extraction, Layout, HSMC, Characterization
- Deep understanding of noise and variation and their impacts on silicon performance and reliability
Bonus Points
- Lead, taped out, brought up CIM chips
- Experienced and comfortable in a chip measurement environment for debug and characterization
- Have used AI and/or scripting languages (i.e. Python, Perl) to automate design flows and data post-processing
Normal Computing Corporation's standard text
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
What this role asks for
Particular to this role
Perl
Rare in Normal Computing Corporation's other 54 open postings.
Standard for software engineering roles
Python
Common in software engineering postings at any company.
58% of this description is written for the role. The rest is Normal Computing Corporation's standard text, folded away below.
Compared with Normal Computing Corporation's other open jobs.
The team: Silicon Chip / ASIC HIRES STEADILY
This role is one of 17 open in Silicon Chip / ASIC. 11 were posted in the last 30 days and the oldest in July: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (12 of 17), FPGA (9 of 17), Verilog (7 of 17), LLM (6 of 17), Perl (6 of 17), CI/CD (4 of 17), Altium (2 of 17)
OTHER ROLES ON THIS TEAM
- Hardware Engineer, FPGA posted Nov 4
- Hardware Engineer, FPGA posted Nov 4
- Hardware Engineer, Analog Design posted Oct 29
- Hardware Engineer, Analog Design posted Oct 29
- Custom Memory Design Engineer posted Oct 29
- Firmware Engineer posted Oct 22
- Firmware Engineer posted Oct 22
- Hardware Engineer, DFT posted Oct 22
- Hardware Engineer, DFT posted Oct 22
- Hardware Engineer, RTL Lead posted Oct 21
- Hardware Engineer, RTL posted Aug 10
- Hardware Engineer, RTL posted Aug 10
- Hardware Engineer, PCB posted Jul 29
- Hardware Engineer, PCB posted Jul 29
- Hardware Engineer, Design Verification posted Jul 15
- Hardware Engineer, Design Verification posted Jul 15
From the team and dates on Normal Computing Corporation's own job board.
Other openings for this role
2 open postings for this role in Mountain View, first posted 16 October 2026. The company is likely hiring for more than one position. None has been taken down and posted again.
- 6 November 2026 – open
- 16 October 2026 – open (this posting)
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