ASIC Design Intern
- Salary
- $35 - $45 /hr
- Level
- Intern
Not stated in the posting: work type, visa.
Open. First seen 21 October 2026.
About the role
SK hynix memory solutions America Inc.'s standard text
About the Company:
At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.
We're looking for innovative minds to join our mission of shaping the future of technology. At SK Hynix Memory, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change – we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices.
As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.
Internship Duration: 6 months
Hours: 40 hours per week
Start Date: Immediately (November 2026/December 2026)
Location: San Jose
About The Role
You will join the System on Chip (SoC) Design Team at SK hynix memory solutions America, a group dedicated to delivering best-in-class controllers for high-performance SSDs. This team spans the full design cycle—from micro-architecture and RTL design to timing closure and tapeout readiness—enabling next-generation enterprise and AI data center storage solutions.
Responsibilities
- RTL design (Verilog/SystemVerilog) for IP based on existing module or new specifications.
- Collaborate, create clear documentation and communication with Design Verification, Silicon Validation, and Firmware teams to ensure design quality.
Minimum Qualifications
- Education: Currently enrolled in BS/MS/PhD program in Electrical Engineering, Computer Engineering, or related field.
- Proficiency in logic design and micro-architecture; RTL coding in Verilog and/or SystemVerilog language.
Preferred Qualifications
- Advanced Education: Master’s or PhD in Electrical Engineering with working experiences.
- Experience or coursework in digital logic design, verification methodologies, and protocols (AMBA, PCIe, NAND, DDR)
- Scripting skills (Python, Perl, TCL) and Linux command-line experiences
- Strong problem-solving and communication skills
- Proficiency in AI tool to generate synthesizable and functional RTL code
COMPENSATION: $35/hr - $45/hr
What this role asks for
Particular to this role
Perl · Verilog
Rare in SK hynix memory solutions America Inc.'s other 25 open postings.
In most of SK hynix memory solutions America Inc.'s ads
Embedded Systems · Machine Learning · Python
Named in most of its open postings, whatever the role.
51% of this description is written for the role. The rest is SK hynix memory solutions America Inc.'s standard text, folded away below.
Compared with SK hynix memory solutions America Inc.'s other open jobs.
The team: System on Chip (SoC) HIRES STEADILY
This role is one of 7 open in System on Chip (SoC). 5 were posted in the last 30 days and the oldest in April: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Machine Learning (7 of 7), Python (7 of 7), Perl (4 of 7), Verilog (3 of 7), ANSYS (2 of 7), Embedded Systems (2 of 7), FPGA (2 of 7)
OTHER ROLES ON THIS TEAM
- Physical Design Engineer posted Oct 7
- Research Intern - Loop Engineering posted Oct 6
- Research Scientist - Loop Engineering and AI Infrastructure posted Oct 2
- Sr. Staff / Principal Physical Design Engineer posted Sep 26
- Embedded Software Engineer Intern posted Sep 12
- Sr./Staff /Sr. Staff Engineer, IP Design (ASIC) posted Apr 13
From the team and dates on SK hynix memory solutions America Inc.'s own job board.
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