Senior Leader, Signal and Power Integrity/Systems Architecture (High-Speed Interconnects) - Multiple locations
- Salary
- $256,600 - $385,000
- Level
- Senior
- Work type
- On-site · San Diego
Not stated in the posting: visa.
Open. First seen 27 October 2026.
About the role
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Packaging Engineering General Summary: The Qualcomm Central Hardware Systems (CHS) team is seeking a Senior Leader, Electrical Systems Architect to define, develop, and productize…
What this role asks for
In most of Qualcomm's ads
Python
Named in most of its open postings, whatever the role.
Compared with Qualcomm's other open jobs.
The team: Packaging Engineering HIRES STEADILY
This role is one of 15 open in Packaging Engineering. 7 were posted in the last 30 days and the oldest in July: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (9 of 15), PCB Design (8 of 15), ANSYS (7 of 15), C (7 of 15), C++ (7 of 15), MATLAB (7 of 15), Perl (3 of 15)
OTHER ROLES ON THIS TEAM
- Principal Thermal Engineer posted Oct 26
- Staff IC Packaging Engineer - Mechanical Simulation posted Oct 20
- Signal and Power Integrity Engineer, Senior to Staff Level posted Oct 14
- RF Package Design Engineer, Senior Staff posted Oct 13
- Central Hardware Systems – EE Automation Engineer, up to Sr. posted Oct 8
- Staff Engineer, Thermal posted Oct 5
- Sr. Staff Packaging Engineer- Process Package Integrity & Bumping posted Sep 25
- Sr Staff or Principal Thermal Engineer, Server Packaging (San Diego) posted Sep 17
- Voltage Regulator (VR) Architect posted Sep 17
- Packaging SIPI Engineer, Sr. Staff posted Sep 17
- RF Electromagnetic (EM) Engineer - San Diego posted Sep 17
- Thermal Engineer, Staff posted Aug 20
- Senior Engineer - IC Package Design posted Jul 31
- 【Welcome New Grads】Package/System Design Solutions Engineer - Engineer / Sr. Engineer posted Jul 26
From the team and dates on Qualcomm's own job board.
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