Senior Design Verification Engineer - Fabric Interconnect
- Salary
- $119,800 - $234,700 per year
- Level
- Senior
- Work type
- On-site · North Carolina
Not stated in the posting: visa.
Open. First seen 1 November 2026.
About the role
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational…
What this role asks for
Particular to this role
Generative AI · Verilog
Rare in Microsoft's other 299 open postings.
Standard for software engineering roles
Python
Common in software engineering postings at any company.
Compared with Microsoft's other open jobs.
The team: Silicon Engineering HIRES STEADILY
This role is one of 51 open in Silicon Engineering. 41 were posted in the last 30 days and the oldest in June: a team that hires all year rather than one being built.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Azure (48 of 51), Microsoft 365 (47 of 51), Python (26 of 51), Embedded Systems (18 of 51), Verilog (14 of 51), C++ (12 of 51), C (11 of 51)
OTHER ROLES ON THIS TEAM
- Principal Validation Engineer posted Oct 30
- Senior Silicon Validation Engineer posted Oct 29
- Senior Logic Design Engineer posted Oct 28
- Senior Security IP Engineer posted Oct 28
- Principal Product Engineer posted Oct 27
- Senior SoC HW Analog/Functional Validation Engineer posted Oct 26
- Principal SoC HW Analog/Functional Validation Engineer posted Oct 26
- Principal Package Engineer posted Oct 26
- Senior CAD Software Engineer posted Oct 26
- Sr. Design Verification Engineer - Fabric Interconnect Performance posted Oct 23
- Principal Silicon Engineer posted Oct 23
- Principal Silicon Security Architect posted Oct 23
- Design Verification Engineer- Senior / Principal posted Oct 23
- Senior SOC Verification Engineer posted Oct 23
- Senior Physical Design Engineer posted Oct 22
- Senior Silicon Engineer posted Oct 22
- Senior SoC HW (Power & Performance) Validation Engineer posted Oct 21
- Senior Principal Power Management Architect posted Oct 21
- Logic Design Engineer posted Oct 21
- Principal Physical Design Engineer posted Oct 20
- Senior Physical Design Engineer posted Oct 20
- Principal Silicon Design Verification Engineer posted Oct 20
- Senior Silicon Engineer posted Oct 20
- Principal Silicon Design Verification Engineer posted Oct 20
- SoC Hardware (Power Management) Validation Engineer posted Oct 19
- Design Verification Engineer - Fabric Interconnect posted Oct 15
- Principal Formal Design Verification Engineer posted Oct 15
- Silicon Physical Design CAD Engineer posted Oct 15
- Senior SOC Integration Engineer posted Oct 14
- Principal SOC Performance Verification Engineer posted Oct 14
- Senior Software CAD DevOps Engineer posted Oct 13
- Senior FPGA/Silicon Design Engineer posted Oct 13
- Director of Package Design posted Oct 13
- Senior Silicon CAD Software Engineer posted Oct 13
- Test Engineer (Silicon Engineering) posted Oct 13
- Design Verification Engineer posted Oct 12
- Senior Packaging Engineer posted Oct 12
- Silicon Debug Engineer posted Oct 12
- Signal and Power Integrity Engineer posted Oct 8
- Principal Silicon Design Verification Manager posted Oct 6
- Design Verification Engineer - DDR Memory Subsystem posted Sep 30
- Physical Design Engineer II posted Sep 30
- Senior Physical Design Engineer posted Sep 18
- SoC HW (Digital, Analog or PnP) Validation Engineer posted Sep 10
- Principal Physical Design Engineer posted Sep 7
- Principal Silicon Engineer posted Sep 5
- Director, Silicon Physical Design CAD posted Aug 5
- Principal Silicon Systems Architect posted Jul 28
- Principal Silicon Engineer posted Jul 22
- Principal Signal and Power Integrity Engineer posted Jun 2
From the team and dates on Microsoft's own job board.
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