CPU Verification Engineer, Director
- Salary
- $252,800 - $379,200
- Level
- Lead
- Work type
- On-site · Santa Clara
Not stated in the posting: visa.
Open. First seen 28 October 2026.
About the role
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to…
What this role asks for
Particular to this role
VHDL · Verilog
Rare in Qualcomm's other 299 open postings.
In most of Qualcomm's ads
Python
Named in most of its open postings, whatever the role.
Compared with Qualcomm's other open jobs.
The team: CPU Engineering
This role is one of 31 open in CPU Engineering. 17 were posted in the last 30 days, including 2 lead roles: the team is hiring the people who run it too.
WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS
Python (22 of 31), Perl (14 of 31), Verilog (11 of 31), C++ (9 of 31), C (8 of 31), VHDL (8 of 31), Embedded Systems (4 of 31)
OTHER ROLES ON THIS TEAM
- CPU Physical Electrical Analysis Engineer posted Oct 27
- Principal CPU PPA Pathfinding Engineer posted Oct 13
- CPU Verification Engineer (Multiple Locations) posted Oct 13
- RTL Verification Engineer - Haifa posted Oct 13
- CPU Architect and Design - MMU & Security - Hod HaSharon posted Oct 12
- CPU Micro-architect/RTL Designer (Multiple Locations), Italy posted Oct 8
- DV CAD Engineer posted Oct 7
- CPU SRAM Design Engineer posted Oct 7
- CPU Post-Silicon Performance Engineer posted Oct 7
- CPU Physical Design CAD Engineer (Sr Staff) posted Oct 6
- Software Engineer — RISC-V Random Test Generator posted Oct 2
- Senior Software Engineer — RISC-V Instruction Set Simulator (Simulator Engineer) posted Oct 2
- CPU Verification Engineer (RISC-V) posted Oct 2
- CPU Micro-Architecture and RTL Design Engineer (RISC-V) posted Oct 2
- CPU STA CAD Engineer posted Oct 2
- CPU SRAM Design Engineer - Sr Staff / Principal posted Oct 2
- CPU Server Physical Design Engineer, Santa Clara posted Oct 1
- CPU RTL/AI Micro-Architect - AI Development posted Sep 18
- CPU Micro-architect/RTL Designer posted Sep 18
- Senior Full Stack Software Engineer – CAD Infrastructure Team posted Sep 17
- CPU Architecture Performance Engineer (Multiple Levels) posted Sep 17
- CPU Synthesis CAD Engineer posted Sep 17
- CPU Integration CAD Engineer posted Sep 17
- CPU Post-Silicon Validation Engineer - Multiple Levels posted Sep 17
- CPU Physical Design Engineer posted Sep 17
- Server Product Architect (RISC-V) – Sr. Director posted Sep 17
- CPU Physical Design Timing Engineer (Austin, TX) posted Sep 17
- Principal CPU Power Modeling Engineer (San Diego, CA) posted Sep 17
- CPU Integration & 3DIC CAD Engineer posted Sep 17
- CPU Physical Design Engineer (Austin) posted Sep 17
From the team and dates on Qualcomm's own job board.
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