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Voltai

Chip Architect

Palo Alto Office
Level
Lead

Not stated in the posting: salary, work type, visa.

Open. First seen 19 October 2026.

About the role

Voltai's standard text

About Voltai

Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.

About the Team

Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.

About this Role

You'll define the architecture of complex SoCs and subsystems, from performance models to the specs that RTL teams build against. You'll work on real silicon programs with the world's largest semiconductor companies while shaping how Voltai's AI reasons about architecture, trade-offs, and design intent.

What You’ll Do

  • Own architecture and microarchitecture for SoCs, subsystems, and IP blocks, from requirements through specification.
  • Build performance, power, and area models to drive trade-off decisions before RTL is written.
  • Define memory hierarchies, interconnects, and interfaces, and lead architecture reviews.
  • Write specifications that RTL, verification, and physical design teams can execute against.
  • Partner with ML researchers to teach models how expert architects reason about design trade-offs, and evaluate the architectures they propose.
  • Work directly with customers to translate their product requirements into silicon.

What We’re Looking For

  • 8+ years of experience in SoC, CPU, GPU, accelerator, or networking architecture.
  • Track record of taking architectures from spec to tapeout.
  • Strong performance modeling skills (C++, SystemC, Python, or equivalent).
  • Deep understanding of memory systems, interconnects, cache coherence, and PPA trade-offs.
  • Clear technical writing and the ability to lead reviews across teams.

Bonus Points

  • Experience with AI/ML accelerators or chiplet-based designs.
  • Hardware/software co-design experience.
  • Interest in how AI can change architecture exploration.

What this role asks for

Particular to this role

C++

Rare in Voltai's other 16 open postings.

87% of this description is written for the role. The rest is Voltai's standard text, folded away below.

Compared with Voltai's other open jobs.

The team: Chips & Silicon HIRES STEADILY

This role is one of 12 open in Chips & Silicon. 10 were posted in the last 30 days and the oldest in November: a team that hires all year rather than one being built.

WHAT THE TEAM WORKS WITH, ACROSS ITS POSTINGS

Python (11 of 12), C++ (3 of 12), Verilog (3 of 12), C (2 of 12), Machine Learning (2 of 12)

OTHER ROLES ON THIS TEAM

From the team and dates on Voltai's own job board.

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